CVE-2020-0574

Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.

CVSS v3 5.9 MEDIUM
CVSS v2.0 3.6 LOW

5.9^/10

CVSS v3 : MEDIUM

Vector :

Exploitability : 0.7 / Impact : 5.2

Attack Vector PHYSICAL

Attack Complexity LOW

Privileges Required LOW

User Interaction NONE

Confidentiality Impact HIGH

Integrity Impact HIGH

Availability Impact NONE

Scope UNCHANGED

3.6^/10

CVSS v2.0 : LOW

Vector : AV:L/AC:L/Au:N/C:P/I:P/A:N

Exploitability : 3.9 / Impact : 4.9

Access Vector LOCAL

Access Complexity LOW

Authentication NONE

Confidentiality Impact PARTIAL

Integrity Impact PARTIAL

Availability Impact NONE

References

Link	Resource
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html	Vendor Advisory

Configurations

Configuration 1 (hide)

AND

cpe:2.3:o:intel:max_10_fpga_firmware:*:*:*:*:*:*:*:*

cpe:2.3:h:intel:max_10_fpga:-:*:*:*:*:*:*:*

History

No history.

Information

Published : 2020-03-12 21:15

Updated : 2024-02-04 21:00

NVD link : CVE-2020-0574

Mitre link : CVE-2020-0574

CVE.ORG link : CVE-2020-0574

JSON object : View

Products Affected

intel

max_10_fpga_firmware
max_10_fpga

CWE

NVD-CWE-noinfo

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